Compute where the weights live.
TetraMem runs AI inside multi-level memristor arrays. The model's weights never travel to a processor, so devices get real-time AI on a fraction of the power.
Partners and investors
Today's AI chips spend most of their energy moving data.
In a conventional processor, a model's weights sit in memory and travel to the compute units for every calculation. At the edge, that traffic drains batteries, adds heat and slows responses. TetraMem removes the trip.
of the power in conventional AI hardware is lost moving data, not computing on it.
Conventional chip
TetraMem
The memory array is the processor.
A memristor crossbar is a grid of tiny programmable resistors. TetraMem uses it to run the core operation of every neural network, the matrix-vector multiply, in a single analog step.
- 01
Store
Each memristor holds one model weight as a conductance level. TetraMem cells hold up to 2,048 distinct levels.
- 02
Apply
Input values arrive as voltages on the rows of the array.
- 03
Multiply and add
Ohm's law multiplies each input by its weight. Kirchhoff's law adds the currents on each column. Every column computes at once.
- 04
Read out
A converter at the end of each column turns the summed current into a digital value for the next layer.
MLX200
The first multi‑level RRAM in‑memory computing chip on 22nm.
MLX200 puts TetraMem's RRAM compute arrays next to mixed-signal compute engines and a RISC-V vector CPU, on TSMC 22nm. Tape-out, manufacturing and first silicon validation are complete.
- Process
- TSMC 22nm
- Compute
- Multi-level RRAM arrays with mixed-signal compute engines
- Control
- Andes NX27V RISC-V vector CPU
- Software
- ONNX models in. INT8 and INT4 quantization. C++ and RISC-V executables out.
- Status
- Silicon validated May 2026. Evaluation kits in the second half of 2026.
Multi-level RRAM memory IP
The same RRAM technology is available as an IP block for evaluation and licensing.
Ask about licensingBuilt for devices that run on a battery.
When AI runs on the device, it answers faster, keeps data private and works offline. MLX200 makes that possible inside a small power budget.
Hearables and audio
Always-on voice and audio processing in earbuds and headsets.
Wearables and health
Continuous health monitoring, processed on the wrist.
AR and VR
Low-latency vision and sensing in headsets and smart glasses.
Smart sensors and IoT
Sensors that decide locally, so only results leave the device.
Edge to cloud
The roadmap scales to 12, 6 and 3nm, and to chiplets for data-center inference.
Peer-reviewed. Built in commercial foundries.
TetraMem's founders have led memristor research for two decades. TetraMem chips are the test bed for results published in Nature, Science and their sister journals.
- High-temperature memristors enabled by interfacial engineering
- A memristor-based in-memory computing SoC with efficient depthwise convolution, with SK hynix
- Real-time signal processing enabled by fused networks on a memristor-based system on a chip
- Radiofrequency signal processing with a memristive system-on-a-chip
- Programming memristor arrays with arbitrarily high precision for analog computing
- Thousands of conductance levels in memristors integrated on CMOS
Building a device that needs AI on a power budget?
Tell us about your product. Our engineers will show you what MLX200 can do for it.